A variety of sources of radiation and high-energy particles can cause a bit to change in a memory device. These changes are referred to as “soft errors”. If these errors occur in program memory, it can result in a catastrophic failure that may cause the entire system to be rebooted. Such failures in telecommunications systems can result in dropped calls. Failures in medical or military equipment can be life threatening. In many systems, it is desirable to reduce failures due to soft errors to an absolute minimum in order to minimize the overall failure rate of the system.
The internal memory of processor chips is particularly vulnerable to soft errors since parity and ECC is typically not used for internal memory accesses which need to be made as quickly as possible. As internal core voltages decrease and internal processor memory increases, systems will become more vulnerable to these soft errors.
Presently the problem of soft errors is addressed by detecting system crashes with watchdog timers or status messaging and then rebooting the system as soon as possible while rerouting ongoing processes through redundant systems. This is not a satisfactory solution since data can be lost during the process of switching to the redundant system and system level redundancy is very expensive.
In addition, many telecommunications applications do not require 100% data integrity, while medical or military applications do require 100% data integrity. Therefore, a system of protection is demanded that meets the varying needs of the users.
The present invention comprises a method of soft error data protection wherein the internal processor memory is divided into three partitions: the Boot and Download Memory, the regular Program Memory and the Data Memory. Each partition receives a different type of protection according to the data's relative importance.